About Course
Architecture and organization of high-performance computers. Principles of instruction sets. Pipeline, instruction level parallelism and multi-processors. Memory, storage and interconnection. Quantitative analysis and evaluation of design alternatives. Historical developments. Architectural trade-offs and innovations
Course Content
Module 1
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Instruction level parallelism
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ILP Concepts and challenges, Hardware and software approaches, Dynamic scheduling, Speculation, Compiler techniques for exposing ILP, Branch prediction
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Multiple issue processors
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VLIW & EPIC, Advanced compiler support, Hardware support for exposing parallelism, Hardware versus software speculation mechanisms, IA 64 and Itanium processors, Limits on ILP
Module 2
Module 3
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